מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
Job Area:
Engineering Group, Engineering Group > CPU Engineering
As CPU Physical Design CAD engineer, you will build and support the world’s best implementation tools and flows. Your tools and flows will ensure our custom CPUs have industry-leading power, performance and area.
Minimum Qualifications:
• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 5+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.
Roles and Responsibilities
Build flows and methodologies for high-performance clocking, including the use of clock mesh structures, clock H-tree/spine structures and multi-source clock tree synthesis
Develop custom in-house tools and/or script-ware to enhance or exceed the capabilities of commercial EDA tools
Develop, integrate and release new features in our high-performance place-and-route CAD flow
Architect and recommend methodology improvements to ensure our silicon has the best power, performance and area
Maintain, support and debug implementation flows, and resolve project-specific issues
Work closely with worldwide CPU physical design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA.
Work with EDA vendors to define roadmap and to resolve tool issues
Preferred Qualifications:
MS/PhD degree in Electrical Engineering or Computer Science
Ten+ years of hands-on experience in place-and-route of high-performance chips - either in a design or CAD role
High level of proficiency in Tcl as well as Python
Experience with automation
Solid knowhow of data structures and algorithms
Data-driven mindset. Knowledge of statistics, data science and machine learning.
Experience with a wide variety of Physical Design tasks - ranging all the way from place-and-route, analysis, timing sign-off and PDV
Experience with advanced technology nodes (5nm or lower)
Solid understanding of digital design, timing analysis and physical verification
Strong user of industry-standard place-and-route tools such as Cadence Innovus
Proven track record of managing and regressing place-and-route flows
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$185,500.00 - $278,500.00
משרות נוספות שיכולות לעניין אותך