Intel Senior Device Engineer 

United States, Arizona, Phoenix 

791430439

is responsible forand Oregon. As part of Intel's IDM2.0 strategy, FMSC is expanding its operations to deliver output for both internal and foundry customers withtechnologies arriving in High-Volume Manufacturing (HVM). Intel has created the HVM Global Yield organization in FMSC to strengthen its yield operation and enable fast-pacedmanagers.FMSC HVM Global Yield organization, reporting to the Director of Device engineering. Selected candidates will work with other members in Global Yield org including Processmodule/yield teams and TD team members to achieve yield ramp-up and process optimization in early production stage, supporting internal and external customers.ngineer's responsibilities will include but not limited to:

• Own engineering projects to execute HVM yield roadmap, device targeting andattainperformance targets.
• Collaborate with Technology Development team to develop new device technology, customize device architecture per customer request and import to production fabs.
• Participate or lead cross-organizational team of engineers toidentifyroot cause of device-related yield/performance issues and define mitigation plan to meet committed production yield/performance targets.
• Own NPI (New ProductIntroduction) in production fabs and perform device-related process optimization to meet foundry customers product specifications and requirements.
• Develop a model to predict device performance accurately in early-to-mid stage of Si progression and drive systematic solution tomaintainbaseline device performance.
• ork with ProcessIntegrationengineers to drive process simplification and implement cost reduction engineering opportunities in line.

the following traits

• interpersonal skills including influencing,engagingand motivating.
• Excellent communication skills, with the ability to convey complex technical concepts effectively.

Minimum Qualifications:

• 's degree inElectrical/ElectronicEngineering, Physics, Chemistry, Materials Science,or in a (STEM) relatedfield of study.
• 6+ years of experience in advanced node semiconductor industry in DeviceEngineering.
• Experience inFinFETtechnology development or high-volume manufacturing.
• Experience with Device Physics and hands-on application in real-worldfabenvironment.

Preferred Qualifications:

• Post GraduatedegreeinElectrical/ElectronicEngineering, Physics, Chemistry, Materials Science,or in a (STEM) relatedfield of study.
• Experience in project/program management and/or task force team lead.
• Experience in serving external Foundry customers through technical interactions.
• Experience in GAA (Gate-All-Around) technology architecture.
• Experience in new semiconductor technology development.
• Experience with FEOL (Front-End-Of-Line)Integrationteams including Fin, Poly, Source/Drain and Gate segments on device performance improvement and targeting with technical understanding on how FEOL process changes impact device parameters.
• Previousrelated work experience in a semiconductor foundry.