Intel Sr Timing Signoff Methodology Lead 

United States, Texas 

784850983

Job Description:

Responsibilities include but are not limited to:

• Performs timing analysis and timing optimization, generates, and verifies timing constraints, and fixes timing violations at full chip/block level for SoCs.
• Conducts timing rollups, designs for functionality, and develops performance and power optimized clock networks.
• Develops and defines methodologies to ensure highest quality of timing models that enable the physical design team to operate efficiently.
• Defines the right process, voltage, and temperature (PVT) conditions to be used for timing analysis for a given design based on the product plans such as operating conditions and binning.
• Works closely with the clocking team and other backend full chip designers for clocking balance, timing fixes, power delivery, and partitioning.
• Collaborates with architecture, clocking design, and logic design teams to deliver flow development for chip integration and validates high performance low power clock network guidelines.
• Understanding of DFT (design for testability) logic and hands-on experience in design closure.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum qualifications:

• Bachelor's degree in Electrical / Computer Engineering, Computer Science or in a STEM related field of study.
• 8+ years of timing verification experience.

Preferred Qualifications:

• Master's degree
• 10+ years STA hands on experience.
• Server experience.

Experienced HireShift 1 (United States of America)US, California, Santa Clara, US, Massachusetts, Beaver Brook, US, Oregon, Hillsboro, US, Texas, Austin
Position of Trust

offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. The application window for this job posting is expected to end by 05/31/2025