Amazon MLA IP Design Verification Engineer Annapurna Labs 

United States, California, Cupertino 

774458970

Job summaryAs a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and validation of machine learning hardware in our data centers.Some of your responsibilities will include verifying/validating that our hardware and software solutions achieve their desired functionality, developing and executing multi-faceted verification/validation plans, and measuring the teams progress towards our ambitious customer metrics.
Key job responsibilities
Some of your responsibilities will include verifying/validating that our hardware and software solutions achieve their desired functionality, developing and executing multi-faceted verification/validation plans, and measuring the teams progress towards our ambitious customer metrics.Work/Life Balance
Mentorship & Career Growth

- BS in engineering
- 5+ years of design verification experience using System Verilog and UVM
- 5+ years in testbench development including: stimulus, checkers, assertions and coverage
- 5+ years of verifying multiple levels of logic including: IP blocks and full SOC system testing
- Experience with C/C++, Python, or Perl
- Significant experience in IP level design verification preferably in the CPU/compute space.

- MS Degree or Higher in EE or CS or CE.
- Experience using multiple verification platforms
- Experience with formal verification
- Experience with embedded software
- Strong ability to deal with ambiguity