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Apple Wireless Design Verification Engineer Center 
Japan, Minato 
77147602

25.03.2025
Description
As a Wireless Verification Engineer, you will be at the core of our wireless product's success, bridging domains, driving collaborations, and developing verification solutions to ensure excellent products. In this role you will take on verification of controllers, blocks, subsystems, protocols, low power capabilities, and SOC / integration frameworks. We will leverage and develop environments, infrastructures, create scenarios, and analyze metrics. Responsibilities include:- Develop feature or subsystem test planning, bring up, through feature closure.- Develop test bench environment, infrastructure, methodology, and flow automation development.- Cross functional partnership, driving verification requirement and deliverable.- Develop constrained randomization scenario development and debug.- Develop regression issue tracking and closure.
Minimum Qualifications
  • BS/MS required
  • Minimum of 5 years of relevant experience.
Preferred Qualifications
  • Knowledge of ASIC verification flows with SystemVerilog (UVM is a plus)
  • Experience developing testbenches from scratch, bringing up designs in simulation
  • Experience with checker implementation, constrained random testing, coverage closure, and RTL simulations.
  • Experience with a scripting language such as Python or similar is valued.
  • Experience in formal verification (assertion-based verification) is a plus.