The application window is expected to close on 11/23/2024
This is an onsite role and will require working out of the Milpitas/San Jose office location.
What you’ll do:
- Develop state-of-the-art emulation environments that will be used to evaluate the performance and functionality of multi-terabit systems.
- Developing emulation infrastructure using C/C++ and TCL
- As a team member, work closely with the design, DV, power, and post-silicon diagnostic teams.
- Assist with test plan design, test implementation, and debugging during the pre-silicon emulation process.
- Develop tests to generate complex traffic, performance scenarios to catch potential post Silicon issues during Pre-Silicon phase.
- Work with leading emulation vendors to troubleshoot issues.
Minimum Qualifications:
- Bachelor’s or Master’s degree in EE (Electrical & Electronics) or CE (Computer Engineering) with 5+ years of relevant experience.
- Prior emulation experience on platforms such as Palladium, Veloce, or Zebu as well as experience with compilation, debug, performance testing.
- Prior experience with RTL development for Emulation prototypes and Verilog, System Verilog.
- Prior experience with C/C++ and TCL infrastructure development
- Prior experience with System debug tools like gdb, waveform debuggers.
Preferred Qualifications:
- Experience with scripting programs (e.g., Python, Perl or similar)
- Post Silicon functional validation or debugging experience is a plus.
- Experience with protocols e.g. PCie, I2C, Ethernet packet headers, Ethernet protocol is preferred.
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