Qualcomm Power Integrity Engineer 

Taiwan, Hsinchu 

748694014

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Qualcomm Power Integrity group is looking for a power integrity engineer to work on power integrity analysis and optimization of next generation of application processors, graphic processors and modems for mobile, auto and wireless LAN platforms. Job responsibilities include SOC floor planning, system optimization, package /PCB optimization and characterization as well silicon package PCB co-design.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.

• 2-5 years of experience in semiconductor industry, Packaging, PCB & Power integrity analysis and measurements

• M. S.C in Electrical Engineering

• Understanding of package and PCB design techniques including optimal layer stack-up and PWR/GND plane/island assignments to minimize voltage noise.

• Understanding of power integrity concepts, methodologies, on chip and off chip decoupling schemes

• Experience in power integrity analysis on main digital domain including application processors, graphic processors and modems.

• Experience in presenting design trade-off analyses and implementation recommendations with custom circuit designers

• Expertise in using Agilent ADS, Hspice and Cadence/Mentor extraction tools

• Understanding of measurement techniques including VNA and time domain measurements

• Knowledge of SOC floor planning and required tradeoffs

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.