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Nvidia Senior Signal Power Integrity Engineer 
Taiwan, Taipei 
494759943

24.06.2024

What you'll be doing:

  • Drive board/system level signal and power integrity requirements

  • Lead board/system SI/PI design activities, including PCB stackup/material selection, design guide implementation, layout review, and post-layout analysis

  • Work closely with Architecture, ASIC, Mixed Signal, Package, and PCB Design teams to design and ensure system SI/PI performance meets expectation before Gerber out, also work closely with Design Validation teams to support SI/PI failure analysis

  • Develop novel algorithms & new methodologies to improve SI/PI modeling efforts

  • Work with Application Engineering teams to support customers w/ SI/PI questions

What we need to see:

  • MS/BS in EE or equivalent experience

  • 5+ years of experience as a SI/PI engineer

  • Deep understanding of electromagnetics, specifically electromagnetic waves including transmission line theory and via properties

  • Proficient with HFSS, Sigrity, Hspice, and/or other simulation tools

  • Experienced with Cadence Allegro PCB designer and Constraints Manager

  • Understanding of high volume manufacturing variations and impact to channel signal integrity

  • Exposure to lab measurements including VNA & TDR experience

  • Passionate about SI/PI work

  • Good written & verbal interpersonal skills in English

Ways to stand out from the crowd:

  • Exposure to interface timing budgets and system modeling

  • Familiarity with high-speed I/O design concepts including clock generation, transmitter & receiver design, and equalization schemes

  • PDN analyses including model generation and time domain simulation

  • Experience w/ Matlab, Python, and C

  • Exposure to package design