ARM Principal Low Power Engineer 

United States, California, San Diego 

725269388

Principal Low Power Engineer role responsible for leading the delivery of SOC execution to meet product specific critical metrics. This work includes power budgeting, use-case analysis, estimation, and optimization for high-volume, sophisticated, SoC platforms on groundbreaking technology nodes across multiple market segments including IoT, AI/ML, compute, automotive, and server.

We are seeking strong technical leadership, with ability to develop accurate project plans involving multiple teams.

• Expertise in RTL and Netlist based power analysis flows with good understanding of SoC physical design flows and simulation/emulation flows.
• Knowledge of ASIC design dependencies on power efficiency including technology node, mixed Vt design, standard cell and memory library selection, voltage and power domain partitioning.
• Proven experience driving multiple projects and supporting junior engineers.
• Appreciation of software use-cases, benchmarks, and workloads and how they interact with hardware low power features like clock and power gating, voltage/frequency scaling, memory/logic retention.
• Excellent presentation, interpersonal and communication skills. Able to present technical content inside and outside of Arm.

• Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PowerArtist, PrimePower, Redhawk, etc)
• Experience running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc)
• Python for automation and modeling.
• SoC use-case power budget decomposition to IP power budget.
• Experience with correlation between pre and post silicon power.

You will join a highly focused group to create, learn, define and lead.