Qualcomm Clock / Power Validation Engineer 

United States, California, San Diego 

690746725

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

Team Details:

• Qualcomm's SoC validation team is an integral part of the global SoC digital hardware organization responsible for the overall quality of the SoC silicon. The validation team works closely with architects, designers, verification engineers, software engineers and customers.

• The overall technical disciplines, languages and methodologies included in Soc validation team are: System debug (emulation, SoC architecture, HW platform & firmware, logic analyzer, JTAG), SoC content developer (SoC, C, assembly, subsystems - CPU core, multimedia, I/O, peripherals, DDR, wireless, modem), CPU content developer (ARM experience strongly preferred, assembly, coherency, concurrency, DVM, ACE, low power, virtual memory, MMU, debug).

• The SoC system infrastructure validation team is a part of the SoC validation team involved in system debug and SoC content development.

Team/Candidate Responsibilities:

• The SoC system infrastructure team leads the efforts in understanding the clocking and power architecture of the Qualcomm SoCs and strategizing the pre and post Silicon validation plans.

• Team develops and maintains the device drivers and firmware of the clock, PMIC (power management integrated circuit), RPM (resource power manager) et al HW blocks across mobile / AI / compute/ server and automotive Qualcomm SoC(s).

• The device drivers play a pivotal role in establishing boot flow, mission mode operations (dynamic frequency voltage switching), LPM (low power mode) entry/ exit and debug.

• Along with the device drivers, team is also responsible for supporting system test content to validate complex system level use cases.

• Team also plays a key role of supporting debug scripts (CMMs) aiding multiple hooks and hacks for debugging complex failure scenarios.

• Process automation using python / shell is a key contribution that the team makes towards methodology improvement.

Candidate Expectations:

• Bachelor’s degree in engineering (electronics, computer engineering etc.)

• 2+ years of relevant experience in SoC validation and / or associated areas (SW development, embedded systems etc.)

• Prior work experience in clock/ voltage/ power validation is desired.

• Knowledge of PMIC is a plus.

• Experience in C/ C++ driver and / or validation framework development is a must have.

• Prior exposure to below SW skills would add an edge above other applicants:

• Experience with Cross-Compilers, Linkers and make files.

• Understanding of coherency and concurrency in modern SoC architectures.

• Should know shell scripting.

• Candidate must be proficient in python.

• Should have exposure to debug tools (JTAG etc.). Knowledge of debug methodology of ARM based SoCs is an absolute plus.

• Knowledge of pre-Silicon validation and debug on FPGA based emulation platforms is a plus.

• Knowledge of RTL and HDLs (Verilog/ System Verilog) would be an additional advantage.

• Should have prior work experience in a cross functional matrix work environment.

• Must have good analytical and debugging skills.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$92,000.00 - $138,000.00