Nvidia ASIC Design Verification Engineer - New College Grad 

United States, Texas, Austin 

687898987

What you'll be doing:

• Design and maintain the unit level/sub-system Verification environment.

• Understand the architecture specifications, develop and carry out the test plan to verify the design.

• Create the UVM components, sequences, tests and scoreboards.

• Sign off on the verification efforts with very high quality code and functional coverage.

• Launch regressions, resolve the issues, and make forward progress towards achieving the DV milestone targets

• Automate the manual steps involved in launching build, regression, and triages.

• Collaborate with architects, designers, and software engineers to achieve the project goals.

• Pro-actively contribute to improving the efficiency of the testbenches by embracing the latest techniques.

What we need to see:

• Completing an MS or higher in Computer or Electrical Engineering (or equivalent experience).

• Experience in System Verilog, UVM and in general OOPS based programming.

• Strong coding skills in Python or other industry-standard scripting languages.

• Strong understanding of RTL design (Verilog).

• Good understanding of computer architecture fundamentals.

• Familiarity with verification tools such as VCS or equivalent simulation tools, and debug tools like Verdi.