המקום בו המומחים והחברות הטובות ביותר נפגשים
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
Key Qualifications and Description
Minimum of 7 years industry experience in the implementation and verification of advanced DFT/DFD (Design for Test/Design for Debug) techniques for low power and multi voltage domain designs. A strong fundamental knowledge of DFT is required
Good knowledge of ATPG with EDA Vendor compression architectures
Expertise of various fault models such as Stuck-at, Transition, Path Delay, Gate-Exhaustive, IDDQ, and Cell Aware.
Hand-on experience on scan insertion, running ATPG and gate level simulations
Experience in DFT implementation, Scan/ATPG, MBIST insertion/validation, coverage analysis.
Must have hands-on experience in scripting languages such as TCL, Perl, etc.
Preferrable experience with Siemens Tessent DFT solutions (e.g. EDT, iJTAG, SSN) and Synopsys FC tool
Excellent communication skills and ability to collaborate
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$158,000.00 - $237,000.00
משרות נוספות שיכולות לעניין אותך