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Google Staff Silicon Engineer Physical Design Quantum AI 
United States, California, Mountain View 
661838318

18.09.2024
Info Note: By applying to this position you will have an opportunity to share your preferred working location from the following: Mountain View, CA, USA; Goleta, CA, USA.Note: By applying to this position you will have an opportunity to share your preferred working location from the following:.
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering or related technical field, or equivalent practical experience.
  • 5 years of experience in Physical Implementation of High Performance ASICs.
  • Experience building ASIC implementation flows (RTL-to-GDS2).

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering or related technical field.
  • Experience as technology lead driving Physical Implementation for complex ASIC project(s).
  • Experience with pre-silicon and post-silicon Design For Test (DFT).
  • Experience in sign-off convergence including Static timing analysis (STA), electrical checks, and physical verification.
  • Experience in package design and signal/power integrity (SI/PI) analysis and strategies.
  • Experience in guiding external vendors in RTL-to-GDS2 chip execution.