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Apple Software Development Engineer United States, Oregon, Beaverton 656599693
Today
In this highly visible role, you will be part of a critical team responsible for physical verification of an SOC.
- As a member of our physical design team, you will perform various types of physical verification checks such as LVS, DRC, design-for-manufacturing & design-for-yield, and lithography at the chip and block level.- You will collaborate with the CAD/Technology teams for flow bring up and validation. We work directly with the implementation team during the entire chip design cycle to drive signoff closure for tapeout.- You will lead schedules and support cross-functional engineering efforts.- You will work on padring, bump, RDL design, and working with the package and floorplan teams.
- Minimum Bachelor's degree.
- Experience with physical verification flows, DRC/LVS/ANT and/or layout integration methodology.
- Knowledge of RTL and GDS physical design flows.
- Scripting skills to debug flow related issues and make enhancements as appropriate.
- Experience with industry standard tools used for physical verification such as Mentor Calibre, and/or Synopsys ICV.
- Layout design experience.
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