As a member of our CAD team, you will:• Develop, maintain, and enhance existing parasitics extraction flow for Apple’s successful silicon designs• Use the most efficient RC analysis skills on various designs to diagnose and debug parasitic effects and guide and design improvement for balanced and minimized parasitic impact• Ensure parasitic RLC accuracy and circuit performance in post-layout simulations using EDA extraction tools and methodologies• Deeply understand parasitic modeling in advanced process technologies and use the knowledge to explain circuit behavior and performance• Work closely with EDA vendors to incorporate new capabilities to solve technical problems• Develop an RC-aware or RC-driven methodology for design optimization