Qualcomm System Cache Architect Design Engineer 

United States, California, San Diego 

647985901

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

The SoC memory team group consists of a multi-disciplinary group involved from early product specification and analysis effort to final RTL delivery of high-performance memory systems to the SoCs. A key function of the job is to identify architecture bottlenecks and drive micro-architecture choices using performance and power analysis feedback.

Skills/Experience:

• Strong working knowledge of memory systems architecture including caching, DRAM architecture, SRAM architecture, and latency/bandwidth tradeoffs.

• Strong working knowledge of architecture tradeoff analysis and performance trouble shooting.

• Experience with cache/memory controller micro-architecture, RTL design and implementation is a plus.

• Ability to define memory system components micro-architecture taking performance/power/area tradeoffs into account.

• Ability to quickly react and adapt to changes.

• Excellent communication skills.

Responsibilities:

Responsibilities also include evaluating new IPs, driving new memory technology deployments as well as defining system wide guidelines for IPs to inter-operate together with the memory system in the SoC.

Computer Architecture, Memory Systems, Caches, DRAM, SRAM

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.

Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.

PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range:

$134,500.00 - $201,500.00