המקום בו המומחים והחברות הטובות ביותר נפגשים
What you'll be doing:
You will be developing physical design, STA, Logic eq, Power Integrity flows and methodologies for implementation of networking chips and SOCs.
Partner closely with block owners, full Chip STA engineers to assure high quality and timely convergence.
Come up with unique and creative solutions to the state of the art physical design problems that are needed for Our chips.
Additional responsibilities include participating and developing flow and tool methodologies for timing analysis and closure, power and noise analysis, IR-drop, EM and back-end verification across multiple projects.
What we need to see:
B.SC./ M.SC. Student in Electrical Engineering/Computer Engineering.
Self-motivation, attention to detail, and good written, verbal, and presentation skills are critical to success in this role.
Ownership, self-learning skills, and ability to work autonomously
Ways to stand out from the crowd:
Knowledge in Tcl/Perl/Python
Versatile
Great teammate
משרות נוספות שיכולות לעניין אותך