IBM Advisory Physical Design Engineer 

India, Karnataka, Bengaluru 

637755264

• Responsible for high performance microprocessor blocks RTL to GDSII implementation
• Perform block level synthesis, floor planning, placement and routing.
• Close the design to meet timing, power budget and area.
• Implement ECO’s to address functional bugs and timing violations.
• Team player, with good problem solving and communication skills.

Required Technical and Professional Expertise

• 7+ years of industry experience
• Good knowledge and hands on experience in physical design and methodology which includes logic synthesis, placement, clock synthesis, routing , post route closure.
• Should be knowledgeable in physical verification (LVS,DRC.. etc), Noise analysis, Power analysis and electro migration.
• Good knowledge and hands on experience in static timing analysis (closing timing at chip level)
• Good understanding of timing constraints.
• Should have experience in handling asynchronous timing, multiple corner timing closure.

Preferred Technical and Professional Expertise

• Automation skills in PERL ,SKILL and/or TCL