Palo Alto ASIC Design Verification Principal Engineer Hardware 

United States, California 

623563410

Being the cybersecurity partner of choice, protecting our digital way of life.

Your Career

As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking next-generation firewall products meet or exceed industry-leading requirements for features, performance, and reliability. You will define verification methodologies, architect test benches, write test plans, specify coverage, write tests, and debug. You will work on diverse platforms including simulation, emulation, and silicon validation.

Your Impact

• Collaborate with engineers in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation, and emulation

• Plan and execute every aspect of simulation test plans using sophisticated coverage-driven, constrained-random methodologies

• Develop flows, methodologies, and infrastructure for emulation - Create, run, and debug emulation tests in close collaboration with system architects, software engineers, and ASIC designers

• Define new tools and methodologies to continuously improve quality and velocity

Your Experience

• BS in EE, CE, or CS required or equivalent military experience required - MSEE preferred

• Minimum 10 years experience in ASIC design verification

• Demonstrated success in taking ASIC products to mass production

• Experience in Networking required

• Expertise in SystemVerilog and UVM

Required strengths

• Defining test plans, including comprehensive adversarial testing

• Developing rich functional coverage models

• Creating powerful and scalable test benches

• Implementing sophisticated self-checking infrastructure with reference models and scoreboards

• Developing reusable constrained-random tests

• Debugging failures

• Closing coverage

Preferred experience

• Networking and cybersecurity

• Silicon validation - bringup, test, debug, and regression

• Creating models in Python and C/C++

• Writing driver code in C

• Skilled in writing powerful, modular, and scalable programs in Python, Perl, and UNIX shell to automate verification tasks, especially regression testing

• Demonstrated ownership and independence in planning, debugging complex failures, closing metrics-driven tasks, driving vendors, and reporting status

• Strong leadership, collaboration, and communication skills

Compensation Disclosure

The compensation offered for this position will depend on qualifications, experience, and work location. For candidates who receive an offer at the posted level, the starting base salary (for non-sales roles) or base salary + commission target (for sales/commissioned roles) is expected to be between $170000 - $225000/YR. The offered compensation may also include restricted stock units and a bonus. A description of our employee benefits may be found .

All your information will be kept confidential according to EEO guidelines.