מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
What you'll be doing:
Own validation of Clocking structures in Tegra SOC GPU ASIC products from start to finish, including test plan development, automation, validation flows development, coverage metrics, test execution, bug identification/fix and productization.
Tackle Sophisticated problems and develop a scalable solution that works across platform.
Hands on industry-standard tools and state of the art verification methodologies. This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools.
Partnering closely with our design team to understand our architecture and the collaborate with Quality Assurance engineers to deliver great test coverage and improve the Hardware quality.
Coordinate with internal and external teams across time zones.
What we need to see:
BS or MS in EE/ECE or equivalent experience.
5+ years of relevant industry work experience.
Good understanding of Logic Design and Architecture.
Expertise in industry-standard verification flows like SV constraint random verification, UVM, Formal Verification, Coverage metrics, profiling tools, X prop, etc.
Exposure on block level and system-level verification.
Strong coding skills in System Verilog, scripting languages (Perl/python) and C++.
Ability to collaborate and work with multiple groups.
Prior experience in implementing Test plans for pre-silicon platforms.
Understanding of DFT/IST is optional.
You will also be eligible for equity and .
משרות נוספות שיכולות לעניין אותך