Job Description:- Define electrical validation strategy & specifications for IO interfaces to achieve optimized analog performance and meet product production goals.
- Validates circuit analog performance, electrical signal integrity for compliance to industry standard specifications, and system level margin for stable operation and production target prediction.
- Conducts multidisciplinary research in the design, development, testing, validation, and utilization of IO and mixed signal architectures inclusive of industry standard datacom applications, custom Intel interfaces, and RF systems implementations.
- Develops procedures, analysis, and designs for validation, validation infrastructure, and systems margin validation.
- Quickly analyse internal and external customer returns with technically sound experimentation, data analysis and succinct communication.
- Applies and uses independent evaluation to select components and equipment based on analysis of specifications, performance, and reliability.
- Performs debug to identify root causes and resolves all functional and triage failures for electrical issues.
- Applies understanding of DFT and DFM to collaborate with architecture, design, and pre-silicon validation teams to ensure capability to validate and test IO architecture implementations.
- Develops and mentors other technical leaders, grows the community, acts as a change agent, and role models Intel values.
- Aligns & champions organizational goals with technical vision, formulates technical strategy to deliver leading edge solutions.
Qualifications:- Bachelor or Master Degree in Electronic or Computer Science Engineering with at least 10 or more years of experience in electrical validation, post silicon validation , SoC / platform Research & development or any relevant field.
- Routinely able to lead cross-functional debug efforts.
- Post-silicon system level hardware and software validation techniques and debug skills.
- Working knowledge of Python or any form of scripting for hardware access or automation.
- Understanding of product lifecycle milestones & deliverables.
- Displays strong problem-solving and analytical skills, with data centric decision making.
- Excellent technical communication with both engineer & management level
Preferred Qualifications:
- Experience in Memory IP post silicon validation is a plus.
- Good understanding of GDDR6, GDDR7, LPDDR5 or HBM memory topology, features and memory PHY circuit architectural analog design knowledge is a plus.
- Familiar with DRAM initialization, memory training and calibration process.
- Knowledge in memory analog tuning to improve system level margin.
- Possess hands on experience in post-silicon circuit electrical characterization activity, be it Bench Design Validation, Signal Integrity Validation, or System Margining Validation.
- Familiar with validation technique and electrical compliance requirement for high-speed memory system.
- Familiar with DFT usage in Electrical Validation environment.
- Familiar with measurement scope for high-speed signals.
- Proficiency in operating hardware measurement equipment and tool, for example: BERT, oscilloscope, sigtest eye diagram tool and etc
Experienced HireShift 1 (Malaysia)Malaysia, Penang