המקום בו המומחים והחברות הטובות ביותר נפגשים
Job Description:
R&D Engineer position available in design and physical implementation of high performance System-On-Chip ASICs. Key competencies required are:
Working experience in (digital) physical design implementation of large scaleASICs (Multi-100million gates complexity).
Demonstrated ability in providing technical support to customers and managing customer working relationships
Demonstrated strong technical hands-on competency in using leading edge physical design EDA tools in projects.
In-depth CPU/DSParchitecture/algorithmworking knowledge and related physical design implementation knowledge is highly advantageous.
Utilize commercial and in-house EDA tools for the design and implementation of multi-100 million gate integrated circuits in 5nm or smaller advanced process nodes.
Opportunity to participate in innovation, design flow and methodology development to address challenges of designing in deep sub-micron processes and state-of-the-art ASIC design for AI/ computing and networking products
Qualifications : Requirements
Bachelors inElectrical/Electronics engineering
Familiarity with VLSI design tools for Place&Route, Verilog simulation, DRC/LVS verification, Timing analysis (STA), Scripting languages - Tcl?Perl/ Python
Proficiency in UNIX/Linux
Compensation and Benefits
The annual base salary range for this position is $59,000 - $95,000.
This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements.
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