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Apple Senior Analog Layout Lead United States, West Virginia 583220455
05.09.2025
Senior Layout Leads are pivotal in delivering Analog Mixed-Signal IP in a SOC flow. You will collaborate with teams of highly skilled individuals to develop the next generation of world-leading SOCs. Your responsibilities include crafting sophisticated layouts for mixed-signal and analog circuits, reviewing floorplans, and analyzing intricate circuits with circuit designers. You'll run complete sets of design verification tools, plan/schedule work, and coordinate vital layout tradeoffs. Interpretation of LVS, DRC, and ERC reports is key to finding the fastest way to complete the layout, exceeding engineering specifications and expectations.
- 10+ years of experience in analog/mixed-signal layout design, with a focus on deep submicron CMOS circuits and at least 3+ years in FinFet technologies
- Programming/scripting knowledge in SKILL, Perl, TCL, Shell, and/or Python
- Familiar with Machine Learning and AI concepts
- Proven expertise in implementing analog layout designs, achieving tight matching, low noise, and low power consumption.
- Must recognize failure-prone circuit and layout structures, have experience with analog and DFM standard methodologies, and be able to identify the best approach to solving problems
- High proficiency in custom and standard cell-based floor-planning and hierarchical layout assembly
- Technical understanding of IR drop, RC delay, electro migration, self-heating, and coupling capacitance
- High proficiency in interpreting physical verification reports (DRC, ERC, LVS, etc.)
- Experience using Cadence Virtuoso's advanced features (XL, EAD, APR, and Constraint Manager)
- Excellent communication skills and ability to work with multi-functional teams
- Cadence Innovus
- CAD Automation experience
- PCell creation experience
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