Amazon Senior ASIC Design Engineer Project Kuiper 

United States, Texas, Austin 

572325475

Key job responsibilities
- Gate Level Simulation: Develop and maintain comprehensive gate-level simulation test plans for verifying ASIC functionality and timing. Analyze simulation results, identify and debug logic errors, and propose solutions. Work closely with design and verification engineers to validate fixes and ensure design closure.
- Facilitate seamless integration across Firmware, RTL, Platform Software, and Platform Drivers.
- Develop Debug tools: RTL Emulation, silicon bring-up, and functional validation.Export Control Requirement:A day in the lifeAbout the team
In this role you will:
· Work closely with the system architects to develop world-class SOC and IP blocks, which meet power, area and performance targets.
· Define, configure and integration SoC Subsystems
· Contribute to the SoC floor planning effort
· Define and develop any necessary support logic
· Configure, instantiate and integrate 3rd party IP blocks
· Understand low power design & the impact of DFT on the blocks
· Perform initial synthesis & timing analysis
· Assist verification team in unit verification including test plan development
· Assist with debug and bring-up

· Bachelor's degree in Electrical / Communications Engineering or related field, or equivalent experience
· 7+ years of experience in digital design, preferably in SoC design and implementation

Master's or Ph.D degree in Electrical / Communications Engineering
· 5+ years of experience in digital design, preferably in communication systems
· Familiarity with UVM and Matlab
· Ability to write assertions and exposure to Formal verification