Key Responsibilities:
Lead the architecture, design, and validation of SERDES IP blocks across multiple generations of Intel process technologies.
Guide the team through all phases of development: specification, design, verification, silicon bring-up, and productization.
Ensure compliance with industry standards (e.g., IEEE 802.3, OIF CEI) and internal quality metrics.
Build and mentor a high-performing team of analog/mixed-signal engineers.
Foster a culture of innovation, accountability, and continuous improvement.
Build and lead a global team.
Work closely with SoC design, packaging, validation, and manufacturing teams to ensure seamless integration of SERDES IP.
Partner with customer engineering and product teams to translate customer requirements into technical deliverables
Own project schedules, deliverables, and risk mitigation plans.
Drive execution excellence and ensure timely delivery of IP to internal and external customers.
Required Experience:
Proven leadership experience managing technical teams.
Excellent communication and stakeholder management skills.
Familiarity with a variety of EDA tools
Strong understanding of semiconductor device physics and process technologies.
Preferred Skills
Experience with advanced packaging and signal/power integrity.
MS or PhD in Electrical Engineering or related field.
10+ years of experience in analog/mixed-signal IC design, with a focus on SERDES.
Weoffer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:
Annual Salary Range for jobs which could be performed in the US:משרות נוספות שיכולות לעניין אותך