מציאת משרת הייטק בחברות הטובות ביותר מעולם לא הייתה קלה יותר
What you'll be doing:
Drive next generation physical design work to achieve best in class PPA for high-performance designs, e.g. Nvidia’s CPUs and GPUs.
Explore design space, create optimum floorplan, drive synthesis, physical implementation, and timing closure by understanding arch/logic as well as dataflow and exhibiting craftsmanship.
Work in a cross-functional environment interacting with multiple teams, including Architecture and RTL team, to solve complex design problems as well as build new methodologies and flows.
What we need to see:
BS (or equivalent experience) in Electrical or Computer Engineering with 5+ years experience or MS (or equivalent experience) with 2+ years experience in physical design and implementation.
Hands-on experience in physical synthesis, floor planning, P&R, and timing closure of high-performance designs with a focus on improving PPA (Performance, Power, Area).
Good understanding of hardware architecture and RTL/logic design for timing closure, specifically experience in critical timing path planning and crafting.
Expertise and hands-on knowledge of industry standard EDA tools for Synthesis, P&R and Timing.
Knowledge of deep sub-micron process nodes and hands-on experience in modeling and converging high-performance designs in these nodes.
Ways to stand out from the crowd:
Background in high-performance designs, such as CPUs, GPUs or Large Cache design implementation and timing convergence.
Understanding of high-performance design issues (timing, power, area, congestions, etc.) and methods/techniques to address those.
Understanding of high-speed clock distribution and planning as well as impact of DFT logic in timing convergence.
Knowledge of circuits and SPICE, as well as experience in methodology and/or flow development and automation.
You will also be eligible for equity and .
משרות נוספות שיכולות לעניין אותך