Nvidia Power Architecture Optimization Engineer – New College Grad 

United States, Texas 

547695036

What You'll Be Doing:

• Use internally developed tools and industry standard pre-silicon gate-level and RTL power analysis tools, to help improve product power efficiency.

• Develop and share best practices for performing pre-silicon power analysis.

• Perform comparative power analysis, to spot trends and anomalies, that warrant more scrutiny.

• Interact with architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.

• Select and run a wide variety of workloads for power analysis.

• Prototype a new architectural feature in Verilog and analyze power.

What We Need To See:

• Pursuing BS or MS in Electrical Engineering, Computer Engineering, or related fields.

• Strong understanding of concepts of energy consumption, estimation, data movement and low power design.

• Familiarity with Verilog and ASIC design principles, including knowledge of Power Artist, PTPX (Prime Power RTL, RTL Architect). Previous internships and/or work on Power Optimization would be beneficial.

• Strong coding/automation skills, preferably in Python, Perl, and C++.

• Strong analytical skills with go-getter attitude.