

Utility Computing (UC)
About AWS
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.Work/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
- integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
- As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
- Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
- Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
- Perform lint and clock domain crossing quality checks on the design.
You will thrive in this role if you:
- Are familiar with scripting in Python
- Are proficient with assertions
- Have good debug skills to analyze RTL test failures
- Have a "Learn and Be Curious" mindsetAbout the team
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
- BS degree in electrical engineering or equivalent
- 5+ years in RTL design for SOC
- 5+ years in VLSI engineering
- 5+ years with code quality tools including: Spyglass, LINT, or CDC
- Master's degree in electrical engineering, computer engineering, or equivalent
- Experience scripting for automation (e.g., Python, Perl, Ruby)
- Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
- Familiarity with data path design, interconnects, AXI protocol
- Good analytical, problem solving, and communication skills
משרות נוספות שיכולות לעניין אותך

Utility Computing (UC)
About AWS
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.Work/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
- integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
- As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
- Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
- Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
- Perform lint and clock domain crossing quality checks on the design.
You will thrive in this role if you:
- Are familiar with scripting in Python
- Are proficient with assertions
- Have good debug skills to analyze RTL test failures
- Have a "Learn and Be Curious" mindsetAbout the team
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
- BS degree in electrical engineering or equivalent
- 3+ years in RTL design for SOC
- 3+ years of VLSI engineering
- 3+ years with code quality tools including: Spyglass, LINT, or CDC
- Experience scripting for automation (e.g., Python, Perl, Ruby)
- Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
- Familiarity with data path design, interconnects, AXI protocol
- Good analytical, problem solving, and communication skills
משרות נוספות שיכולות לעניין אותך

Utility Computing (UC)
About AWS
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.Work/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
- integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
- As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
- Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
- Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
- Perform lint and clock domain crossing quality checks on the design.
You will thrive in this role if you:
- Are familiar with scripting in Python
- Are proficient with assertions
- Have good debug skills to analyze RTL test failures
- Have a "Learn and Be Curious" mindsetAbout the team
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
- B.S. in Electrical Engineering or related technical field
- 5+ years in RTL design for SOC
- 5+ years of VLSI engineering
- 5+ years with code quality tools including: Spyglass, LINT, or CDC
- Master's degree in electrical engineering, computer engineering, or equivalent
- Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
- Experience with automation and scripting languages such as Python
- Familiarity with data path design, interconnects, AXI protocol
- Good analytical, problem solving, and communication skills
משרות נוספות שיכולות לעניין אותך

Utility Computing (UC)
About AWS
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.Work/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
- integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
- As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
- Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
- Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
- Perform lint and clock domain crossing quality checks on the design.
You will thrive in this role if you:
- Are familiar with scripting in Python
- Are proficient with assertions
- Have good debug skills to analyze RTL test failures
- Have a "Learn and Be Curious" mindsetAbout the team
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
- B.S. in Electrical Engineering or related technical field
- 5+ years in RTL design for SOC
- 5+ years of VLSI engineering
- 5+ years with code quality tools including: Spyglass, LINT, or CDC
- Master's degree in electrical engineering, computer engineering, or equivalent
- Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
- Experience with automation and scripting languages such as Python
- Familiarity with data path design, interconnects, AXI protocol
- Good analytical, problem solving, and communication skills
משרות נוספות שיכולות לעניין אותך

Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
As an ASIC Design Engineer, you will:• Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets• Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power consumption, performance, and area requirements• Create microarchitectures, implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints• Execute lint and clock domain crossing quality checks to ensure design integrity• Collaborate closely with cross-functional teams, including architects, fellow designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts
You will thrive in this role if you:
- Have a "Learn and Be Curious" mindset
- Have familiarity with key components such as interconnects, DMAs, Memory sub-systems, accelerator engines, debug and system level architectures
Work/Life Balance
Mentorship & Career Growth
- Bachelor's degree or equivalent
- 3+ years of non-internship design or architecture (design patterns, reliability and scaling) of new and existing systems experience
- Master's degree in computer science or equivalent
- 3+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience
משרות נוספות שיכולות לעניין אותך

We are looking for technical builders who love the idea of working with early stage startups to help them as they grow. In this role, you’ll work directly with a variety of interesting customers and help them make the best (and sometimes the most pragmatic) technical decisions along the way. You’ll have a chance to build enduring relationships with these companies and establish yourself as a trusted advisor.As well as spending time working directly with customers, you’ll also get time to “sharpen the saw” and keep your skills fresh. We have more than 200 services across a range of different categories and it’s important that we can help startups take advantages of the right ones. You’ll also play an important role as an advocate with our product teams to make sure we are building the right products for the startups you work with.For the customers you don’t get to work with on a 1:1 basis, you’ll get the chance to share your knowledge more broadly by working on technical content and presenting at events.Key job responsibilities
• Help a diverse range of startups to adopt the right architecture at each part of their lifecycle
• Support startups in architecting scalable, reliable and secure solutions
• Support adoption of a broad range of AWS services to deliver business value and accelerate growth
• Support the evolution and roadmap of the AWS platform and services, connecting our engineering teams with our customers for feedback
• Establish and build technical relationships within the startup ecosystem, including accelerators, incubators and VCs
• Develop startup specific technical content, such as blog posts, sample code and solutions, to assist customers solve technical problems and reduce time-to-marketAbout the team
Diverse Experiences
Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.
Work/Life Balance
Mentorship and Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.
- 2+ years of design, implementation, or consulting in applications and infrastructures experience
- 4+ years of specific technology domain areas (e.g. software development, cloud computing, systems engineering, infrastructure, security, networking, data & analytics) experience
משרות נוספות שיכולות לעניין אותך

Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
As an ASIC Design Engineer, you will:• Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets• Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power consumption, performance, and area requirements• Implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints. Execute lint and CDC checks to ensure design integrity• Collaborate closely with cross-functional teams, including architects, fellow designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts• Lead and Design to meet requirements or solve a system problem at a product or product family level. Take the lead on projects and partner with management & cross discipline engineers to deliver solutions. Mitigate long-term risks. Find a path forward in difficult situations. Make trade-offs: short vs. long-term needs. Mentor and performs hiring decision assessments.You will thrive in this role if you:
- Have a "Learn and Be Curious" mindset
- Have familiarity with accelerator design, interconnects, DMAs, Memory sub-systems, CPU cores, SIMDs, debug and system level architectures
Work/Life Balance
Mentorship & Career Growth
- Bachelor's degree, or Master's degree
- 10+ years of programming with at least one software programming language experience
- Experience as a mentor, tech lead or leading an engineering team
- 5+ years of leading design or architecture (design patterns, reliability and scaling) of new and existing systems experience
משרות נוספות שיכולות לעניין אותך

Utility Computing (UC)
About AWS
Diverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.Work/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
- integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
- As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
- Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
- Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
- Perform lint and clock domain crossing quality checks on the design.
You will thrive in this role if you:
- Are familiar with scripting in Python
- Are proficient with assertions
- Have good debug skills to analyze RTL test failures
- Have a "Learn and Be Curious" mindsetAbout the team
Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
- BS degree in electrical engineering or equivalent
- 5+ years in RTL design for SOC
- 5+ years in VLSI engineering
- 5+ years with code quality tools including: Spyglass, LINT, or CDC
- Master's degree in electrical engineering, computer engineering, or equivalent
- Experience scripting for automation (e.g., Python, Perl, Ruby)
- Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
- Familiarity with data path design, interconnects, AXI protocol
- Good analytical, problem solving, and communication skills
משרות נוספות שיכולות לעניין אותך