Amazon ASIC Design Engineer Cloud-Scale Machine Learning Acceleration team 

United States, Texas, Austin 

463514267

Custom SoCs (System on Chip) live at the heart of AWS Machine Learning servers. As a member of the Cloud-Scale Machine Learning Acceleration team you’ll be responsible for the design and optimization of hardware in our data centers including AWS Inferentia, our custom designed machine learning inference datacenter server. Our success depends on our world-class server infrastructure; we’re handling massive scale and rapid integration of emergent technologies. We’re looking for an ASIC Design Eengineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right trade-offs.
Key job responsibilities
- integrate multiple subsystems into top level SOC, ensure correct clock/reset/functional/DFT signal routing
- As a key member of the ASIC design team, you will implement and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
- Analyze design, microarchitecture or architecture to make trade-offs based on features, power, performance or area requirements.
- Develop micro-architecture, implement SystemVerilog RTL, and deliver synthesis/timing clean design with constraints.
- Perform lint and clock domain crossing quality checks on the design.
You will thrive in this role if you:
- Are familiar with scripting in Python
- Are proficient with assertions
- Have good debug skills to analyze RTL test failures
- Have a "Learn and Be Curious" mindsetAbout the teamDiverse Experiences
AWS values diverse experiences. Even if you do not meet all of the qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.
About AWSInclusive Team CultureWork/Life BalanceMentorship & Career Growth
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

- B.S. in Electrical Engineering or related technical field
- 5+ years of experience in RTL design for SOC
- 5+ years of experience VLSI engineering
- 5+ years of experience with code quality tools including: Spyglass, LINT, or CDC

- Master's degree in electrical engineering, computer engineering, or equivalent
- Experience with Microarchitecture, SystemVerilog RTL, Assertions, SDC constraints
- Experience with automation and scripting languages such as Python
- Familiarity with data path design, interconnects, AXI protocol
- Good analytical, problem solving, and communication skills