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Tesla Staff Physical Design Engineer Dojo United States, California, Palo Alto 53372665
- Lead and drive large design blocks and SOCs from early design stage to tape out
- Floorplan and partition designs to meet area, timing, and power requirements
- Construct high-speed blocks, from synthesis, place, and route, out through timing, physical, and electrical closure to meet performance, robustness, reliability, and power targets
- Read RTL, understand block micro-architecture, perform RTL modifications and prove logical equivalence as needed
Engineering degree in a related field, or equivalent experience
10+ years of industry work experience in VLSI/IC design
Knowledge and experience with logic design and synthesis tools and techniques
Proficient in place and route tools and approaches, in timing and electrical analysis in advanced nodes, including high-frequency design closure, IR drop, power, and reliability
Skilled with CAD tools and scripting languages (Perl or Python)
Understand cell and transistor level digital circuit design, memory and clock structures, and design methodologies
Good understanding of RTL, DFT, and microarchitecture
Good communication skills and a demonstrated team player
Flexible and able to work independently in a fast-paced environment
Experience in any of these areas is a plus: SOC level physical integration and validation, Post-silicon characterization
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