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What you will be doing:
Work on the development and layout of novel integrated photonic devices for high-speed optical interconnect and sensing applications.
Developing physical design methodologies for implementation of graphics processors and SOCs.
Key responsibility includes developing unique and creative solutions to the state of the art physical design problems that are needed for NVIDIA chips.
Participate in developing flow and tool methodologies for chip floorplan, waveguide routing, pcell deveploment, chip assembly, and back-end verification across multiple projects.
Conduct chip layout circuit design, circuit checking, and device evaluation and characterization.
What we need to see:
MS in Electrical or Computer Engineering (or equivalent experience)
Minimum 5 years experience in Physical Design Engineering
Familiar with aspects of chip design including Floor planning, Clock and Power distribution, Place and Route, Integration and Verification.
Strong background with hierarchical design approach, top-down design.
Familiar with various process related design issues including Design for Yield and Manufacturability, EM and IR closure and thermal management.
You'll need to have expertise and in-depth knowledge of industry standard EDA tools.
Proficiency in programming and scripting languages, such as, Perl, Python, and C++.
You will also be eligible for equity and .
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