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Job Area:
Engineering Group, Engineering Group > ASICS Engineering
The DDRSS systems engineer is responsible validating and tuning the DDR subsystem on pre and post silicon platforms. The role requires strong collaboration with design, validation teams, and software teams to ensure key power and performance features are enabled in our products. The team is also responsible for delivering and validating low level FW APIs. The candidate will use his/her understanding of system considerations to methodically collect stability, power, and performance data to drive decisions. This expansive role requires a firm grounding in embedded systems and digital design. The team is responsible for developing FW written in C, and validating the code in DV environments, emulation platforms, and silicon platforms. Familiarity with interconnect and memory subsystems (cache, DDR) are preferred. Familiarity with C coding, silicon debug and post silicon testing methods are required.
Required Qualifications
Experience writing firmware in C
5+ Years of experience
BSEE in Computer Engineering with focus in embedded systems or VLS
Preferred Qualifications
Experience debugging and collecting data from post silicon platforms
Experience running and updating verilog simulation testbenches
Familiarity with DDR, caches, and interconnects
Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.
Pay range:
$134,500.00 - $201,500.00
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