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Google SoC Design Engineer Machine Learning Accelerators United States, California, Sunnyvale 472213985
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Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience with Register-Transfer Level (RTL) coding using Verilog/SystemVerilog.
- Experience with industry-standard Electronic design automation (EDA) tools for simulation, synthesis and power analysis.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering, or Computer Science , or a related technical field.
- Experience architecting RTL solutions employing software based construction, instantiation, customization and generation of RTL.
- Experience with SOC implementation standards and interfaces (i.e. AXI).
- Experience with scripting languages (i.e. Tcl, Python or Perl).
- Experience with CDC, RDC, RTL Linting and LEC is desirable.
- Understanding of digital design fundamentals, including synchronous and asynchronous logic, state machines, and bus protocols.
משרות נוספות שיכולות לעניין אותך
