Amazon Sr Hardware Development Engineer - PCIe AWS 

United States, California, Cupertino 

465067367

As a member of the AWS Board Core Design & Services team, you will own next-generation server components with a strong focus on PCIe design, from SerDes electrical through protocol functionality. Your expertise in PCIe protocol analysis, compliance testing, and performance optimization will be crucial for ensuring robust system functionality across AWS server platforms. You will have demonstrated results in the architecture and debugging of PCIe-based systems, including root complex behavior, endpoint functionality, and complex PCIe fabric implementations. You will interact with an interdisciplinary team of engineers to analyze, debug, validate, and optimize PCIe implementations at large scale.A day in the life*Why AWS*
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Amazon values diverse experiences. Even if you do not meet all of the preferred qualifications and skills listed in the job description, we encourage candidates to apply. If your career is just starting, hasn’t followed a traditional path, or includes alternative experiences, don’t let it stop you from applying.*Work/Life Balance*
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*Mentorship and Career Growth*
We’re continuously raising our performance bar as we strive to become Earth’s Best Employer. That’s why you’ll find endless knowledge-sharing, mentorship and other career-advancing resources here to help you develop into a better-rounded professional.

- BS Electrical/Computer Engineering (or equivalent experience)
- Experience with PCB schematic and layout design
- Proficient in one or more aspect of PCIe standards: electrical, physical layer, data link layer and transaction layer at PCIe Gen5 or above. Hands-on experience with functionality and operation of LTSSM and link layer behavior desirable
- Strong proficiency with PCIe protocol analyzers (Teledyne LeCroy, Keysight, etc.)
- Experience with PCIe compliance testing and validation
- Proven track record in PCIe performance optimization and root cause analysis

- Master's degree in electrical engineering, computer engineering, or equivalent
- Master's degree in electrical engineering, computer engineering, or equivalent Knowledge of SerDes architecture including Rx equalization and adaptation, Tx , CDR, SerDes link jitter budget. Hands-on experience of PAM4 SerDes desirable
- Exceptional debug skills and the ability to define an articulate a methodical approach to resolving issues.
- Fluent in Python programming language, working knowledge of C programming language
- Experience with PCB schematic and layout design
- Requires extensive lab experience using high performance test equipment such as BERTs, high speed oscilloscopes, protocol analyzers/exercisers
- Knowledge of Data Center architecture such as switches, routers, interconnects. Hands-on experience with system level PCIe architecture, behavior and qualification desirable