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Google Program Manager III Life Cycle Assessment Cloud Sustainability United States, Texas, Austin 46376618
28.04.2025
Minimum qualifications:
Preferred qualifications:
- Bachelor's degree in Electrical Engineering or Computer Engineering, or equivalent practical experience.
- 5 years of experience with RTL design using Verilog/System Verilog and microarchitecture.
- Experience in ARM-based SoCs, interconnects and ASIC methodology.
Preferred qualifications:
- Master’s degree in Electrical/Computer Engineering.
- Experience with methodologies for low power estimation, timing closure, synthesis.
- Experience with methodologies for RTL quality checks (e.g., Lint, CDC, RDC).
- Experience with a scripting language such as Python or Perl.
משרות נוספות שיכולות לעניין אותך
