Marvell Analog IC Design Engineer Senior Staff 

United States, California, Irvine 

461371626

As an intern, you’ll work alongside world-class engineers on real silicon for next-gen data communication. You’ll gain hands-on experience in the design, layout, and verification of high-speed analog and mixed-signal circuits using advanced BiCMOS and FET technologies.As a member of the design group, the candidate will be responsible for design, layout and verification of FET and BiCMOS circuits for high-speed broadband ICs that serve these applications.

What You Can Expect

• Understand the requirements of the product and how your block fits into it.
• Capture schematics in Cadence Virtuoso
• Investigate new architectures to come up with the best choice for the requirements.
• Perform layout of an integrated circuit block.
• Create an extracted model of the design.
• Run simulations to verify the performance of the design.
• Document the design and hold a design review with the design team.

What We're Looking For

Looking to fill a 4 to 8 month position with a flexible start date.

• Candidate MUST be currently pursuing a MSc or PhD degree in EE or related technical field(s)
• Detailed understanding of various different circuit blocks such as:
• Opamps, VGAs, High Speed Drivers, TIAs, Mixers, VCOs.
• Ability to analyze feedback networks.
• Familiarity with layout.
• Understanding of device physics.
• Strong communication, presentation, and documentation skills

• Knowledge of Cadence design software.
• Knowledge of SiGe Bipolar as well as CMOS is a plus.
• Ability to perform electro-magnetic analysis and simulation of planar inductors, trasmission lines and t-coils.
• 0-4 years of previous industry experience