Intel FVCTO - Formal Verification Senior Engineer 

United States, Texas 

457270218

a brighter future. Every day, we createtechnology that enriches the lives of every person on earth. So, if you have a big idea,

The Data Center and AI (DCAI) delivers leadership Xeon products to cloud,and AI customers through development of industry leading IPs that enhances product performance and competitiveness in both Xeon and AI platforms. IP design group within DCAI designs Coherent Fabric IP, Memory controller, NOC, PCIE and many fundamental building blocks for the Xeon server SOCs.

Who You Are

Come and joina winningVerification Engineer, you will be responsible the following but not limited to:

• Verify microarchitecture using industry standard Formal Verification tools and technologies basedon latest model checking and equivalence checking algorithms on world class design IPs andSOCs for Server,Clientand Graphics.

• Use the hardware architecture design and RTL implementation details.

• Define the Formal Verification scope, deploy the right strategy to provethe correctnesswhiledeploying advanced formal techniques, and create abstraction models for convergence on the

• Carve out the right boundaries for the design, create comprehensive formal verification test plans, track, verify, apply abstraction techniques, and converge on complex designs to deliver a high-quality design on schedule and articulate the ROI. Analyses new methodologies, evaluates newtoolsandcorroborate

In addition to thequalifications,:

• Problem solving and debugging skills.

• Willingness to work closely with various design teams and cross site teams.

• Verbal and written communication skills

• , self-directed,

You mustthe minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience.preferred qualifications are in addition to therequirements and are considered a plus factor in

Minimum Qualifications

possess the following:

• Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with4years relevant experience or schoolworkORMaster's Degree in Electrical Engineering, Computer Engineering, Computer Science or a related field with3years relevant experience or schoolworkOR PhD in Electrical Engineering, Computer Engineering, Computer

Experience in the following:

• RTL languages like System Verilog or VHDL

• Assertion languages likeSVA,formal verification.

Preferred Qualifications

Experience with:

• The fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs

• Formal verification principles and methods

• Computer architecture, digitaldesignand verification methods

• Research in formal verification domain