Qualcomm Lead Physical Verification Engineer 

India, Karnataka, Bengaluru 

454869136

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

• Experience : 6+ years(A Must)

• Implementation with emphasis on Physical Verification & Hard macro/core finishing activities.

• Must have led and been primarily responsible for physical verification checks , fixing and sign-off.

• Excellent understanding of Physical Verification flow with in-depth experience in analyzing and debugging DRC, ERC, LVS, DFM, Antenna, PERC, and Rule deck issues. (Mostly Working on Calibre tool)

• Deep understanding of ESD, latch-up etc.

• Own and execute PV activities at the Top/Block level.

• Work closely with PD team in addressing their PV issues and suggest solutions to them.

• Work with CAD team in refining the existing flows/methodologies and to resolve the issues.

• Experience in IO, Bump planning and RDL routing Strategy is a plus.

• Develop and implement timing and logic ECOs is a plus

• Innovus/FC level DRC fixing is a plus

• Python, PERL/TCL knowledge is a plus.

• Ability to plan and work independently and coordinate with cross-functional teams

• Has ability to close sign off DRC based on PNR markers is plus

Skill Set:

• Experience with physical verification checks DRC, LVS, Antenna, ERC, PERC, ESD etc.

• Experience in PnR tools like ICC/Innovus with regards to physical convergence must.

• Understanding sign-off PDV tools like PDK Concepts, SVRF, Calibre and ICV.

• Good overall understanding of the Custom IC design flow.

• Good understanding of layouts and overall backend tool flow would be beneficial.

• Understanding sign-off PDV tools like PDK Concepts, SVRF, Calibre and ICV.

• TCL/PERL Scripting is plus.

• Hands on experience :Innovus/Fusion Compiler , Tech lef is preferable.

• People management /Floorplanning/Power Planning/PDN experience is BIG Plus

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.