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Apple Mixed Signal Modeling/Verification Engineer United States, Texas, Austin 441388788
18.11.2024
Description
Development of RNM RF/Analog models in System Verilog.Develop models with self-checking techniques.Assess required model accuracy level depending on verification goals.Develop appropriate assertions to enforce analog/digital specs are respected and provide digital verification passing criteria.Work with Analog designers setting up AMS simulation environment.Debug complex chip digital-on-top testbenches and seek root causes for failures.
Minimum Qualifications
- BSEE with a minimum of 3 years of relevant experience.
- Strong fundamentals in analog/RF circuit concepts/topologies.
- Experience in RNM coding in SystemVerilog.
- Experience working with Cadence mixed signal verification environment.
- Experience modeling mixed signal/RF blocks including biasing networks, power regulators, bandgaps, Opamp’s, OTA’s.
Preferred Qualifications
- MSEE or beyond is preferred.
- Ability to read analog schematics and extract related main functionality.
- Experience modeling RF building blocks e.g. LNA, PA, coupler, splitter, combiners, etc...
- Experience modeling high frequency PLL’s.
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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