As a CPU Cache Microarchitect/RTL Engineer, you will own or participate in the following: • Micro-architecture development and specification - from early high-level architectural exploration, through micro-architectural research and arriving at a detailed specification. • RTL ownership - development, assessment and refinement of RTL design to target power, performance, area and timing goals. • Verification - support the verification team in test bench development, formal methods, and simulation/emulation for formal verification • Performance exploration and correlation - explore high-performance strategies and work with the performance verification team to verify that the RTL design meets targeted performance. • Design delivery - work with multi-functional engineering team to implement and verify physical design on the aspects of timing, area, reliability, testability and power.