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Google Silicon Digital Design Engineer 
United States, California, Mountain View 
417551003

12.06.2024
Minimum qualifications:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • 3 years of experience with digital logic design principles, RTL design concepts, and languages such as Verilog or SystemVerilog.
  • Experience with logic synthesis techniques to optimize RTL code, performance, and power, as well as low-power design techniques.

Preferred qualifications:
  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Knowledge of high performance and low-power design techniques.
  • Knowledge of ASIC verification, design for testing (DFT), or physical design.
  • Knowledge of hardware security.