Nvidia Senior ASIC Verification Engineer 

United States, California 

409433194

In this role, you will work closely with Architects and ASIC Engineers to define and implement test plan, own all tasks involved in verification sign off to deliver high quality IPs, which are used in NVIDIA products around the world.

What you’ll be doing:

• Develop and craft testplans based on architecture and microarchitectural specs. Drive testplan reviews with design/architecture teams.

• Develop testbenches and checkers based on UVM methodology.

• Develop RISCV microcode and tests in System Verilog & C/C++.

• Monitor the overall health of IP by defining and tracking verification metrics. Analyze functional/code coverage and work with design engineers to close coverage.

• Participate in the research of verification methodology to improve automation, productivity, and efficiency.

• Develop infrastructure and test suite to validate display performance.

• Collaborate with teams across multiple sites.

What we need to see:

• BS/MS or equivalent experience in Electrical Engineering, Computer Engineering, or related field with at least 6+ years of proven experience.

• Background in verification using random stimulus along with functional coverage and assertion-based verification methodologies.

• Experience with test bench environments for unit and system level verification.

• Expertise in System Verilog.

• Good debugging and problem solving skills.

• Perl/Python and C/C++ programming language experience.

• You have excellent written, verbal and technical interpersonal skills.

• Demonstrate use of out-of-box thinking for creative solutions to highly sticky problems.

Ways to stand out from the crowd:

• Outstanding programming skills in Python, C/C++ is a huge plus.

• Consistent track record to work independently as well as in a multi-disciplinary group environment.

• You are a strong self-starter who loves to solve complicated problems.

• Familiarity with pixel processing, ISO performance testing and high level synthesis based designs.