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Apple Integration Engineer United States, California 394374513
09.07.2025
The ideal candidate will have experience in ASIC design with:• IP Integration: Integrate third-party or internal IP blocks (e.g., CPU, GPU, memory controllers, custom logic) into a SoC.• RTL Integration: Manage and merge RTL codebases, ensure connectivity and bus/interface protocols (e.g., AMBA, AXI, AHB) are correctly implemented.• Top-Level Assembly: Create and maintain top-level SoC RTL, wrappers, and interconnects.• Linting and Synthesis: Run and debug lint, CDC/RDC, and logic synthesis to ensure design quality.• Build and Test Infrastructure: Develop and maintain automated build and regression systems for integration.• Design Constraints: Define and validate synthesis and timing constraints (SDC files).• Timing Closure: Work closely with physical design and STA teams to achieve timing closure at top level.• Functional Verification Support: Provide integration-level support to design verification teams, including simulation bring-up and debug.• Documentation and Reviews: Create and maintain design documents and participate in design reviews.
- Bachelor's Degree with +3 Years of Experience
- Solid understanding of digital logic design and RTL development (SystemVerilog, Verilog).
- Familiarity with SoC design flows and tools (e.g., Synopsys, Cadence).
- Experience with bus protocols (AXI, AHB, APB) and interface standards (PCIe, USB, DDR).
- Knowledge of ASIC tool flows: lint, synthesis, CDC, DFT, STA.
- Strong scripting skills (Python, Perl, TCL, Shell) for automation.
- Good debugging and problem-solving skills.
- Excellent communication and cross-functional collaboration.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
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