Cisco ASIC Design Verification Engineer 

United States, California, San Jose 

383070940

service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio.

• You will participate in the ASIC design verification for Cisco high-end switching products.
• Development of simulation models, test plans, direct and random tests, code or functional coverage, multi-chip/system simulation, and performance analysis.
• Collaborate with the hardware, software designers, and vendors.

• You can take on problems of moderate scope involving multiple modules, work under general supervision, and follow established procedures.
• You understand product-level architecture.
• Exercise judgment within defined standards and consult with management.
• Promote collaboration with team members.

• Bachelor's degree in electrical or computer science or computer engineering with 7 years of related experience or Master's in electrical or computer science or computer engineering combined with 5 years of related experience
• Experience in System Verilog/UVM.
• Experience with ASIC design and verification processes, debugging, methodology, and tools.
• Experience in verifying blocks/clusters/full chip level for ASIC.

• Post-silicon lab bring-up experience is a plus.
• Knowledge of Linux is needed. C/C++ and Python/Perl are preferred.
• Knowledge of Networking is preferred.
• Experience with Formal verification is a plus.

We tackle whatever challenges come our way. We have each other's backs, recognize our accomplishments, and grow together. We celebrate and support one another—from big and small things in life to big career moments. Giving back is in our DNA (we get 10 days off each year to do just that).