Qualcomm Server RAS Architect 

United States, Texas, Austin 

370213912

Job Area:

Engineering Group, Engineering Group > CPU Engineering

Position: Server RAS Architect

The ideal candidate will have extensive knowledge of CPU and SoC architecture for datacenter SoCs, including experience in microarchitecture and design of coherent CPU subsystems. CPU subsystem microarchitecture involves design and deployment of data, control and debug features using interconnects, power management, RAS, and debug and trace blocks. Strong analytical, problem-solving, and communication skills are essential for excelling in this position.

Minimum Qualifications

• Bachelor's degree in Computer Science/Engineering, Electrical Engineering, or a related field.

• Over 7 years of experience in architecting RAS solutions for complex server SoCs.

• In-depth understanding of the interaction of on-chip errors and error handling flows with system firmware/software

• Detailed knowledge of multiprocessor system architecture, memory and input-output subsystems, high-speed interconnects, operating systems/hypervisors, platform firmware, Error correcting codes (ECC)

• Strong expertise in power management of a high-performance system including management of active power, idle low power and silicon/system limits

• Strong expertise in defining and developing debug features associated with high performance designs

• Strong technical documentation skills, along with excellent written and verbal communication abilities.

Preferred Qualifications

• Master's in Computer Science/Engineering, Electrical Engineering, or related field.

• 15+ years in developing RAS architecture for CPUs and/or SoCs.

• Experience with ARM ISA and related RAS specifications

• Expertise in quantifying FIT rates of functional blocks, SoCs and the platform

• Expertise in silicon and system test methodologies to quantify benefits of RAS mechanisms

• Experience in micro-architecture and/or design of RAS solution for multiple functional blocks of a CPU/SoC like L2/L3, directory, interconnects, memory controllers, etc.

• Understanding of advanced features like Chipkill, forward error correction

• Strong understanding of DFx technologies like DFT, DFY, DFM

Key Responsibilities

• Work with chip architect to understand architecture concept and high level requirements

• Define and document and RAS and Error Handling strategy for the chip

• Collaborate with other stakeholders to quantify metrics associated with the RAS implementation

• Evangelize/communicate these to silicon, system and software stakeholders

• Assess and identify error mitigations to address the needs of a wide range of market segments

• Participate in new product development, comprehend customer technical requirements, develop architectural solutions to meet those requirements

• Work with design and verification teams to ensure implementation is in accordance with the specification

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 8+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 7+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 6+ years of Hardware Engineering, Software Engineering, Electrical Engineering, Systems Engineering, or related work experience.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

$233,000.00 - $349,600.00