Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
8 years of experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and chips.
Experience with silicon power reduction techniques
Experience in Register Transfer Level (RTL) logic design using SystemVerilog or similar Hardware Description Language (HDL), and industry experience in silicon power or RTL design.
Preferred qualifications:
Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
15 years of experience in ASIC design.
Experience in developing chip power architecture or design. Experience with optimizing silicon designs for low-power
Experience in data center power profiling and reducing carbon footprint.
Experience in pre-silicon power modeling and measurement.
Understanding techniques such as Dynamic and Voltage and Frequency Scaling (DVFS), Turboing, Thermal management and Firmware based power management techniques.