Intel Senior BEOL Process Integration Development 

United States, Arizona, Phoenix 

345820938

BEOL (Back-End-Of-Line) Sr. Process Integration Development engineer's responsibilities include (but not limited to):

• Own engineering projects to execute HVM yield roadmap, device targeting and attain performance targets.
• Collaborate with Technology Development and Local Yield teams to import new technology to production fabs.
• Work with FEOL/BEOL Integration, Device, Defect Reduction and Yield Analysis team members to identify root cause of yield/performance issues and implement mitigation plan in defined timeline to meet committed production yield/performance targets and to support fast paced yield ramp-up in high-volume manufacturing phases.
• Perform feasibility studies, plan and conduct experiments to fully characterize the process throughout the development cycle and to improve performance for each specific product.
• Own NPI (New Product Introduction) in production fabs and perform product-specific process optimizations to meet foundry customers specifications and requirements.
• Own engineering projects in partnership with Local Yield teams to improve product yield, quality, device performance and to reduce wafer cost/improve fab efficiency.
• Engineering support for technical interactions with internal and external customers.

Candidate should possess the following behavioral skills:

• Must demonstrate solid communication skills.
• Ability to work with multi-functional, multi-cultural teams.
• Demonstrated interpersonal skills including influencing, engaging, and motivating.
• Problem-solving technique with strong self-initiative and self-learning capabilities.

Minimum qualifications:

• Bachelor’s degree in one of the following disciplines:Electrical/ElectronicEngineering, Physics, Chemistry or Materials Science or in a similar field of studies.
• 6+ years of experiencein advanced node semiconductor industry in BEOL Process Integration (preferably with experience in SADP/SAQP, advanced metallization, immersion lithography/EUV).
• Experience in Device Physics and backend critical parameter control.
• Experience with processes including lithography, dry etch, wet etch, CMP, diffusion, implant, thin films, and metrology.

Preferred Qualifications:

• Advanced (Masters/PhD) degree in one of the following disciplines:Electrical/ElectronicEngineering, Physics, Chemistry, Materials Science or in a similar field of studies.
• Experience in project/program management and/or Task Force Team lead.
• Ability to leverage big data analysis to identify process design weaknesses and/or manufacturing weaknesses in order to propose corrective, data-based solutions.
• Experience in statistics and machine learning.
• Ability to extracts insights from structured and unstructured data by quickly synthesizing large volumes of data and applying statistics and machine learning.
• Experience in new semiconductor technology development.

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits