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Apple CPU Silicon Timing Correlation Engineer United States, Texas, Austin 337915601
06.06.2024
Description
- Create and refine methodologies for isolating and debugging timing failures in system and on tester- Develop, modify and deploy tests on silicon as part of characterization plan- Analyze silicon parametric data and correlate with empirical observations- Maintain and improve infrastructure for gathering silicon parametric data at scale- Enhance existing silicon debug features and conceive of new ones.
Key Qualifications
- Minimum BS and 10+ years of relevant industry experience
- Good all round hardware and data analysis skills
- Good understanding of VLSI design practice and static timing analysis
- Data analysis skills and experience using Python/JMP
- Understanding of SoC/CPU architecture is desirable
- Grasp of structural test (ATPG, MBIST) methods is highly desirable
- Proven ability to lead a broad team towards successful closure on timing debug issues
- Track record of innovation in the area of silicon timing correlation
- Lab experience (system, board or tester platform) required
- Excellent teamwork and communication. Ability to work with multiple teams in delivering a solution.
Education & Experience
Minimum BS and 10+ years of relevant industry experience
Additional Requirements
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
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