Intel Layout Design Engineer 

Mexico, Jalisco, Guadalajara 

321006207

Job Description:

Designs and optimizes custom physical layouts for analog, mixed-signal, and memory circuits in CMOS technology, ensuring performance, area, and reliability goals are met.

Your responsibilities will include but not limited to:

• Plan, design, and validate highly customized physical layouts using Virtuoso XL.
• Collaborate with circuit designers to meet functional and performance specs.
• Leverage best-known methods to create high-quality layouts efficiently.

The ideal candidate should exhibit the following behavioral traits:

• Advanced problem-solving skills, collaboration, and team skills.
• Strong problem-solving and teamwork skills.

Qualifications:

Minimum qualificationsare required to be initially considered for this position.

• Bachelor's degree in electrical engineering, computer engineering, or related field.
• Intermediate to advanced English level.

3+ years in any of the following:

• Device-level CMOS analog/memory custom layout design.
• Hierarchical layout floorplan and integration
• Proficient in EDA tools, DRC/LVS, and CMOS process.
• Experience with basic integrated circuit operation.
• Experience in Unix environment.

Must have unrestricted - permanent right to work in Mexico.

The position is in Mexico; it is not eligible for employment-based visa/immigration sponsorship.

Preferred qualificationsare in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

• Experience with advanced process nodes.
• ICC, Fusion compilers, and ICWBEV+.
• Scripting experience (Python, SKILL) for automation.
• Berkely Analog Generator.
• Knowledge of VLSI design.

Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or

Experienced HireShift 1 (Mexico)Mexico, Guadalajara

This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change.