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Apple Design Verification Engineer United States, Texas, Austin 318593487
Yesterday
APPLE INC has the following available in Austin, Texas. Understand details of High-Efficiency SOC Architecture, standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low power spec, multi-processor systems, DDR, PCIe, DDR, Memory Controller Sub Systems, USB, PLL, power-up, Secured Boot schemes. Create coverage driven verification plans from specifications, review and refine to achieve coverage targets. Create IP level module and sub-system verification plan, TB, portable test benches, sequences, and test infrastructure. Architect UVM-based highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches, and test suites to SOC level, achieve targeted coverage, working with design, architecture, SW, FW, and external IP delivery teams to efficiently integrate and verify overall SOC design. Work closely with DV methodology architects to improve verification flow.40 hours/week.
- Master’s degree or foreign equivalent in Electrical Engineering, Computer Engineering or related field.
- Experience and/or education with each of the following:
- Understanding Hardware Description Languages like Verilog, VHDL, and coding.
- Programming Language SystemVerilog
- Digital design, circuit designs, and their usage patterns.
- Understanding computer architecture concepts, advanced HW Design, and Computing Systems Architecture.
- Microprocessors architecture and coding the assembly instructions to execute the programs.
- Scripting languages Perl, tcl, or Python.
- Understanding Linux or Unix OS.
- Knowledge of semiconductor physics and transistors behavior in different combinations
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